![]() A custom MIPS ISA: mixes instructions from different MIPS revisions. ![]() This new design is called Allegrex and runs at a variable speed, from 33 MHz to 333 MHz.Īllegrex is a complete 32-bit core offering : In the official documents, they refer to it as a ‘MIPS core’ which borrows some IP from the MIPS R4000 (you may remember Nintendo doing something alike). ![]() Moving on, the main CPU is also an in-house design by Sony. The SoC is called Tachyon, a name chosen by Sony themselves (after watching some Star Trek?). ![]() This includes the main CPU in charge of executing games and other programs (unlike the other CPUs, which we’ll talk about in due time). Similarly to Nintendo, Sony built an extremely packed System-on-Chip (SoC) that houses most of the components we are going to discuss throughout this article. Main one plus the others I made for each section). If you ever feel fed up with information, don’t forget to take a look at the diagrams (the It’s not a short write-up, but I hope that at the end of the article you will be able to grasp the building blocks of this console (its design rationale, choice of CPUs, GPU pipeline, security system and so forth). This article is dedicated to anyone that wants to understand, straight to the point, how the PSP operates. Released just one month after the Nintendo DS, Sony’s PSP proved that ‘horizontal innovation’ is not the only way to succeed in the portable console market. Motherboard with important parts labelled Diagram Main architecture diagramĪfter the 'Slim' model, NAND and SDRAM size were doubled (to 64 MB each) ![]() This tells you how fast technology has become!Īfter the 'Slim' model, Tachyon and 'NAND + SDRAM' became one. Those zigzags you see between the CPU and memory attempt to correct the length of each bus so all of the signals arrive at the same time. If you use accessibility tools or legacy browsers, switch to the ‘classic’ edition. ![]()
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